may 2015 rev. 1.0 www.microsemi.com 1 ? 2015 microsemi corporation- analog mixed signal m icrophone p re -amplifer with digital output functional block diagram amp select ldo in clk gnd l/r data vdd ecm figure 1 functional block diagram features ? integrated 4 th order sigma-delta adc, with 20khz signal bw, pdm output and clock ? frequency of 1mhz to 3mhz ? 20db gain ? sleep mode with low quiescent current < 40a ? low input capacitance 0.2pf typical ? low noise 5v rms typical input noise (a- weighted, input shorted) ? stereo-audio compatible with l/r channel select ? rohs compliant & halogen free applications ? small diameter electret microphones with digital output description the aap149b is a chip-scale device with digital output developed specifically for integrating in small form factor two terminal electret condenser microphones. the aap149b provides pdm bit stream output and can run with a clock frequency of 1mhz to 3mhz and it has incorporated of 4 th order sigma-delta adc. the adc has a 20khz signal bandwidth. the single bit modulator features an inherently linear output, as well as enabling noise shaping and shifting of quantization noise. the aap149b provides ultra-low input capacitance and noise performance, 5vrms typical with shorted input to ground, and it also provides excellent rfi and emi immunity. the aap149b has 20db gain and low quiescent current in sleep mode. sleep mode is automatically detected by the clock frequency falling below 100khz. additionally, the aap149b is configured to be compatible with stereo audio applications, with provision of a left and right channel select. the aap149b is provided in a chip scale 6pin smd package. the package size is 810m x 1200 m; with an overall height of 3 50 m including solder bumps. this extremely small package size and aspect ratio is optimum for use in small diameter microphones. available in tape & reel package. aap149b downloaded from: http:///
aap149b electret condenser microphone pre- amplifer with digital output 2 may 2015 rev. 1.0 pin configuration clk gnd data vdd in l/r xy figure 2 pinout (top view) ? top mark xy and pin 1 indicator (laser mark) xy= unique lot code assigned for each assembly order ordering information pin description pin designator description clk adc clock input of 1mhz to 3mhz gnd ground data data output pin, selectable by l/r vdd power input, 1.6v to 3.6v in analog signal input for electret condenser microphone l/r left or right channel select. l/r sets low for left channel, vdd for right channel ambient temperature type package part number packaging type packing qty - 40 c to 85 c rohs2 compliant, pb -free halogen free csp aap149bs-m6b-g- lf - tr tape and reel 3500 downloaded from: http:///
absolute maximum ratings may 2015 rev. 1.0 3 absolute maximum ratings parameter min max units power supply (vdd) -0.5 5 v analog input (in) -0.5 0.5 v voltage on clk ( without loading clock) 5 v voltage on l/r 5 v maximum operating ambient temperature -40 85 c maximum storage temperature - 65 100 c peak package solder reflow temperature (40 seconds maximum expos ure) 260 c note: exceeding any absolute maximum ratings could cause damage to the d evice. all voltages are with respect to gnd. currents are positive into, negative out of specified terminal. these are stress ratings only and functional operation of the device at these, or any other conditions beyond those indicated under recommended operating conditio ns are not implied . exposure to absolute maximum ratings for extended periods may affect device reliability. typical operating conditions parameter symbol min. typ. max. unit supply voltage range vdd 1.6 3.3 3.6 v operating temperature range t a -4 45 c clock rise and fall time 10 ns downloaded from: http:///
aap149b electret condenser microphone pre- amplifer with digital output 4 may 2015 rev. 1.0 electrical characteristics note: unless otherwise specified, all limits are guaranteed for t a = 25c, vdd = 3.3v , v in = -44dbv rms , f clk =2.4mhz, 50% duty , c mic =5 pf parameter test conditions min typ max units power supply supply voltage (vdd) 1.6 3.3 3.6 v supply current in=gnd, clk=2.4mhz, no load normal mode (i dd ) vdd=1.8v 510 a vdd=3.3v 600 a sleep mode ( i sb ) vdd=1.8v , f clk =gnd 8.2 40 a vdd=3.3v , f clk =gnd 15.5 40 a performance transfer function (tf) 20 db v/db fs nominal sensitivity in=1khz , -44dbv -24 dbfs signal- to -noise ratio (snr) in=1khz, -44dbv , a -weighted 60 db(a) input referred noise (ein) 20hz to 20khz, a-weighted , 5 v rms dynamic range derived from ein and max acoustic input 90 db band width 25 20000 hz frequency response low frequency -3db point 33 hz high frequency -3db point 20 khz thd & noise ( thd+n) 0.21 % overload margin @1% thd +n 81 mvpk @5% thd +n 91 mvpk input capacitance ( c in ) 0.2 pf input resistance ( r in ) > 20 g? maximum acoustic input 120 dbspl power supply rejection ratio (psrr) in=gnd, 217hz, 100mvpp square wave superimposed on vdd=1.8v - 70 dbfs digital input/output characteristics input voltage high (v ih ) i out =1.8ma 0.65*vdd vdd+0.3 v input voltage low (v il ) i out =1.8ma -0.3 0.35*vdd v output voltage high (v oh ) i out =1.8ma 0.65*vdd vdd+0.3 v output voltage low (v ol ) i out =1.8ma -0.3 0.35*vdd v noise floor 20hz to 20khz, a-weighted - 83 dbfs timing characteristics start-up period (note 1) 5 ms sleep time (t sl ) (note 3) time from clk falling < 100khz 10 ms wake-up time (t wu ) (note 2) time from clk rising > 100khz, power on 10 ms clock frequency ( f clk ) 1 2.4 3 mhz clock duty ratio 40 50 60 % downloaded from: http:///
electrical characteristics may 2015 rev. 1.0 5 parameter test conditions min typ max units clock rise/fall time (t cf, t cr ) r l =1m? & c l =1 5 pf 10 ns time from clk transition to data becoming valid (t dv ) on falling edge of clk, l/r=gnd, cl=15 pf 20 ns time from clk transition to data becoming hi-z (t dh ) on rising edge of clk, l/r=gnd, cl=15 pf 15 ns time from clk transition to data becoming valid (t dv ) on rising edge of clk, l/r=vdd, cl=15 pf 26 ns time from clk transition to data becoming hi -z (t dh ) on falling edge of clk, l/r=vdd, cl=15 pf 14 ns load capacitance on data (c l ) 100 pf notes: (1) start-up period is measured when vdd becomes 3.3v to the time when tra nsfer function settles within 1db of its final value. after start-up period, the device can handle equivalent of 1pa with thd <10%. (2) the wake-up period is measured when the clock frequency is higher than 100khz and the transfer function is settles within 1db of its final value. (3) fall-sleep period is measured when the clock frequency fall s below 100khz and current drops to the stand- by current i sb . (4) the stand-by mode is entered when the clock frequency is belo w the specified clock frequency. timing diagram clk data1 data2 t clk t dh t dv t dh t dv hi-z hi-z timing diagram of clk and data terminals downloaded from: http:///
aap149b electret condenser microphone pre- amplifer with digital output 6 may 2015 rev. 1.0 applications information vdd is required to decouple using 0.1f ceramic capacitor. it should be placed very close to the vdd pin and gnd. due to very high input impedance, careful consideration should be taken to remove all flux used during the reflow soldering process. a 100 ? resistance is recommended on the clock output of the devi ce driving aap149b to minimize ringing and improve signal integrity. for optimal psrr, route a trace to the vdd pin. do not place a vdd plane under the dev ice. pre- amp select ldo in clk gnd l/r data vdd ecm pdm input audio amplifier v supply v supply sdi clk mono microphone application circuit pre- amp select ldo in clk gnd l/r data vdd ecm pdm input audio amplifier v supply v supply sdi clk pre- amp select ldo in clk gnd l/r data vdd ecm v supply stereo microphone application circuit downloaded from: http:///
package outline dimensions may 2015 rev. 1.0 7 package outline dimensions the package is halogen free and meets ro hs 2 and reach standards. a1 e1 a2 e d d1 e ? b 6x a note: 1. solder ball composition is snag 2. dimensions are in mm, inches for reference only. dim m illimeters i nches min max min max a 0.252 0.352 0.0099 0.0139 a1 0. 065 0.09 5 0.0026 0.0037 a2 0. 175 0 .2 25 0.0 069 0.0 089 b 0.1 05 0.0041 d1 0. 9 70 bsc 0.0 382 bsc d 1.200 1.225 0.0 472 0. 0482 e 0. 485 bsc 0.0 1 91 bsc e1 0. 570 bsc 0.0 2 24 bsc e 0.810 0.835 0.0319 0.0329 figure 3 6 bump x2 csp micro smd package dimensions downloaded from: http:///
aap149b electret condenser microphone pre- amplifer with digital output 8 may 2015 rev. 1.0 0.970mm 0.570mm ?0.080mm cu pad ?0.140mm solder mask opening 0.485mm feed direction pin 1 carrier tape tape (pocket) pitch ? carrier tape width 8mm ? reel diameter 7 ? devices per reel 3,500 figure 4 pcb layout footprint / tape and reel information downloaded from: http:///
aap149b-1.0/05.15 microsemi corporation (nasdaq: mscc) offers a comprehensive portfoli o of semiconductor and system solutions for communications, defense & security , aerospace and industrial markets. products include high-performance and radiation-h ardened analog mixed-signal integrated circuits, fpgas, socs and asics; power management products ; timing and synchronization devices and precise time solutions, setting the worlds standard for time; voice processing devices; rf solutions; discrete components; secu rity technologies and scalable anti-tamper products; power-over-ethernet ics and midspans; as well as custom design capabilities and services. microsemi is headquartered in aliso viejo, calif., and has approximately 3,400 employees globally. learn more at www.microsemi.com . microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any par ticular purpose, nor does microsemi assume any liability whatsoever arising out of the application or use o f any product or circuit. the products sold hereunder and any other products sold by microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or appli cations. any performance specifications are believed to be reliable but are not verified, and buyer m ust conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. buyer shall not rely on any data and performance specifications or param eters provi ded by microsemi. it is the buyers responsibility to independently determine suitability of any p roducts and to test and verify the same. the information provided by microsemi hereunder is provided as is , where is and with all faults, and the entire risk associated with such information is entirely with the buyer. microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, o r any other ip rights, whether with regard to such information itself or anything described by such information. i nformation provided in this document is proprietary to microsemi, and microsemi reserves the right to make any changes to the information in this document or to any products and services at any time w ithout notice. microsemi corporate headquarters one enterprise, aliso viejo, ca 92656 usa within the usa : +1 (800) 713-4113 outside the usa : +1 (949) 380- 6100 sales : +1 (949) 380- 6136 fax : +1 (949) 215- 4996 e-mail : sales.support@microsemi.com ? 2015 microsemi corporation. all rights reserved. microsemi and the microsemi logo are trademarks of microsemi corporation. all other trademarks and service marks are the property of their respective owners. downloaded from: http:///
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